Electronic devices, such as tablets, computers, copiers, digital cameras, smart phones, control systems and automated teller machines, among others, often employ electronic components which leverage integrated circuit (e.g., chip) package assemblies for increased functionality and higher component density. Chip package assemblies include one or more integrated circuit dice mounted on a package substrate.
Prior to incorporation into an electronic device, chip packages are tested to ensure that the performance of the chip packages meet predefined performance criteria. In most conventional automatic test equipment utilized to test chip packages, some type of clamp or actuator is utilized to force the chip package into a test socket that electrically couples the circuitry of the chip package with test circuitry of the automatic test equipment. The actuator of the automatic test equipment is typically coupled to a first end of a workpress. The workpress may be any interface utilized to push or drive a device under test (DUT) or other workpiece against the test socket or other supporting surface A second end of the workpress has a surface specifically designed to engage the top surface of the chip package while pressing the chip package into the test socket. The actuator is configured to move the workpress to apply a force to the top of the chip package, thus urging the chip package into the test socket. Because second surface of the workpress contacting the chip package is typically machined out of aluminum, workpress may not apply force as designed to the chip package due to height differences within the chip package, such as for example differences in height between stiffeners, lids, package substrates and the like. The nonuniform application of force results in some regions of the chip package receiving too much force while other regions not receiving enough force to ensure good electrical connection between the chip package and test socket. Undesirably, this may lead to damage and poor testing of the chip package. The challenges of applying force as intended increases dramatically in lid-less chip package designs where differences in the heights of tightly spaced dice may vary significantly.
Therefore, a need exists for an improved test system and method for testing integrated circuit packages.